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BIT1612 10-Bit Digital Video Decoder with OSD and T-CON

R_SPI2_EN 0x13C[3] RW 1

SRGBOUT[8] = SPI CLK

SRGB_SDO = SPI DATA

SRGB_CS = SPI CS

EEPROM Write Protection Enable

0: Disable

R_WP_EN 0x13C[6] RW 1

1: Enable

7.2.2 Instruction Set

BIT1612 內建Script Control Function 提供下列的指令碼，相對應的Instruction Set與Instruction

Format，請參考 Table 7-4 及 Table 7-5。

Table 7-4 Instruction Set

BIT

Instruction

Command

Byte

C Z

0 0 0 0 0 0 0 0

ADD

A_REG Í A_REG +B_REG

1 ● ●

0 0 0 0 0 0 0 1

SUB

A_REG ÍA_REG – B_REG

1 ● ●

0 0 0 0 0 0 1 0

INC

A_REG Í A_REG + 1

1 ● ●

0 0 0 0 0 0 1 1

DEC

A_REG Í A_REG – 1

1 ● ●

0 0 0 0 0 1 0 0

CLR

A_REG Í 0

1 ●

0 0 0 0 0 1 0 1

COMP

A_REG – B_REG (Not Update A_REG)

1 ● ●

0 0 0 0 0 1 1 0

MOV B,A

B_REG Í A_REG

0 0 0 0 0 1 1 1

HALT

Program Stop Into Standby Mode

0 0 0 0 1 0 0 0

AND

A_REG Í A_REG (AND) B_REG

1 ●

0 0 0 0 1 0 0 1

A_REG Í A_REG (OR) B_REG

1 ●

0 0 0 0 1 0 1 0

XOR

A_REG Í A_REG (XOR) B_REG

1 ●

0 0 0 0 1 0 1 1

NOT

A_REG Í ~A_REG

1 ●

0 0 0 0 1 1 0 0

SHR

A_REG Í A_REG >> 1

1 ●

0 0 0 0 1 1 0 1

SHL

A_REG Í A_REG << 1

1 ●

0 0 0 0 1 1 1 0

SWAP

A_REG Ù B_REG

1 ●

0 0 0 0 1 1 1 1

XCHG

A_REG[7:4] Ù A_REG[3:0]

●

0 0 0 1 0 R10 R9 R8

MOV A, @R[ADDR]

A_REG Í R[ADDR]

2 ●

0 0 0 1 1 R10 R9 R8

MOV @R[ADDR], A

R[ADDR] Í A_REG

0 0 1 0 0 0 0 0

MOV A, #NUM

A_REG Í #NUM

2 ●

0 0 1 0 0 0 0 1

MOV B, #NUM

B_REG Í #NUM

0 0 1 0 0 0 1 0

DELAY #NUM

Delay #NUM XCLK

0 0 1 0 0 1 0 0 NOTC 1 ●

1 2 ... 86 87 88 89 90 91 92 93 94 95 96 ... 114 115

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